Physical Design/Verification Engineer

Cerebras is developing a radically new chip and system to dramatically accelerate deep learning applications. Our system runs training and inference workloads orders of magnitude faster than contemporary machines, fundamentally changing the way ML researchers work and pursue AI innovation.

We are innovating at every level of the stack – from chip, to microcode, to power delivery and cooling, to new algorithms and network architectures at the cutting edge of ML research. Our fully-integrated system delivers unprecedented performance because it is built from the ground up for the deep learning workload.

Cerebras is building a team of exceptional people to work together on big problems. Join us!


As a member of our small physical design team, you will perform all physical verification checks at the chip level.

You will be involved in all aspects of physical design, place & route implementation and chip level physical verification and methodology.

Skills & Qualifications

  • 5+ years of physical design/verification experience.
  • Strong knowledge of full-chip physical verification methodology.
  • Expert with ICV/Calibre tools and in resolving full-chip DRC and LVS issues.
  • Custom Layout design experience & skills a plus.
  • Understanding of padring, bump, RDL design and chip floorplan a plus.  
  • Experience with the complete physical design flow using ICC2/Innovous, PrimeTime, StarRC a plus.
  • Proficiency in scripting language like Tcl and/or Python to make flow enhancements.

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