Key Enabling Technologies
An HPC Cluster on a Single Chip
With 900,000 cores and petaflops of compute, each CS-3 delivers the performance an HPC cluster in a single device.
44GB of On-Chip Memory
With 880x more on-chip memory than H100s, run the most daunting simulations with almost unlimited bandwidth.
Gigantic On-Chip Fabric
A gigantic fabric connects 900,000 programmable compute elements with single-cycle latency enabling best-in-class small message passing.
Software Development Kit
Allows researchers to extend the platform and develop custom kernels – empowering them to push the limits of AI and HPC innovation.
Cerebras SDK
A general-purpose parallel-computing platform and API allowing software developers to write custom programs (kernels) for Cerebras systems.
UNPRECEDENTED SPEED
Testimonial
“By using innovative new computer architectures, such as the Cerebras WSE, we were able to greatly accelerate speed to solution, while significantly reducing energy to solution on a key workload of field equation modeling.
This work combining the power of supercomputing and AI will deepen our understanding of scientific phenomena and greatly accelerate the potential of fast, real-time, or even faster-than-real-time simulation.”
Dr. Brian J. Anderson
Lab Director
National Energy Technology Laboratory
Ready to get started?
If you are curious about programming for wafer-scale or want to evaluate whether the CS-2 system would be a good fit for your organization, we encourage you to get in touch.
The following data points will help us answer your questions most effectively:
- What limits your performance today? Arithmetic? Memory latency or bandwidth? Communication latency or bandwidth? Something else?
- Can you give us specific algorithms or example code and data?
- How do you develop code today?
- In what languages?
- What libraries do you use?
- What floating point precision do you need? What integer word length?
- Are any open benchmarks of interest to you?